Chapter 4

4.1 System Architecture

4.2 Computer Architecture

ISO/IEC 42010: 2007: International guidelines of creating and maintaining system architectures

CPU: computer’s brain

ALU: logical and math part of CPU

Register: memory

Control unit: controlling and collection data and order and sending them to CPU

General registers: ALU’s “scratch pad”

Special registers: special and important data storage

Program counter: memory address

Stack: communicate instructions and data to each other

Program status word: the variable that indicates to the CPU what mode instruction need to be carried out in.

User mode: protection mode

Kernel mode: confidence mode

Address bus: connection between processing component and memory segment used to communicate the physical memory address

Data bus: connection between processing component and memory segment used to transmit data

Symmetric mode multiprocessing: two or more CPU work in one mode

Asymmetric mode multiprocessing: two or more CPU work in different mode

4.3 Operating System:

Processes enter and exit different states

A process table contains process status data that the CPU requires:

Process one code executed, moving process one’s status data into CPU, CPU work process one, Process two code executed, moving process one’s status data back to process table, moving process two’s status data into CPU, CPU work process two

Thread management:

4.4 Type of Memory:

Random Access Memory (RAM): temporary storage

Read-Only Memory (ROM): if the data put in ROM, it won’t be change

Cache Memory: high-speed writing and reading memory

4.5 Input and Output Device Management and CPU Architecture:

Programmable I/O: if using programmable I/O, it means CPU sent data to I/O and check if it is ready to accept more data.

Interrupt-Drive I/O: if using interrupt-Drive I/O, it means CPU stop one activity and to process other program.

I/O using DMA: work without CPU

Premapped I/O and fully mapped I/O: system trust premapped, and it doesn’t trust fully very much.

CPU Architecture:

Models è Programming language è Operating system (OS) è Instruction set architecture è Microarchitecture è Hardware

4.6 Operating System Architectures:

Layered operating system: User applications (User space) è I/O management (kernel) è Message interpreter (kernel) è Memory management (kernel) è Processor allocation and process scheduling (kernel) è Hard ware; and the hardware sent information back.

Monolithic: all operating system in kernel mode.

Microkernel: core operating system processes run in kernel mode and the remaining ones run in user mode

Hybrid microkernel: all operating system processes run in kernel mode

47 System security modes:

Bell-LaPadula model: it has the simple security, *-property rul, the strong star property rule

Biba model: the simple intergrity axiom, the #-integrity axiom,

Clark-Wilson model: subject only access object, separation duties, auditing is required

Information flow model: information just work under its security policy

Noninterference model: built-in system, outside can’t join it

Brewer and Nash model: Chinese wall